114 lines
3.9 KiB
C++
114 lines
3.9 KiB
C++
// Licensed to the Apache Software Foundation (ASF) under one
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// or more contributor license agreements. See the NOTICE file
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// distributed with this work for additional information
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// regarding copyright ownership. The ASF licenses this file
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// to you under the Apache License, Version 2.0 (the
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// "License"); you may not use this file except in compliance
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// with the License. You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing,
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// software distributed under the License is distributed on an
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// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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// KIND, either express or implied. See the License for the
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// specific language governing permissions and limitations
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// under the License.
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// From Apache Impala (incubating) as of 2016-01-29. Pared down to a minimal
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// set of functions needed for Apache Arrow / Apache parquet-cpp
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#pragma once
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#include <cstdint>
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#include <memory>
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#include <string>
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#include "arrow/util/macros.h"
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#include "arrow/util/visibility.h"
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namespace arrow {
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namespace internal {
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/// CpuInfo is an interface to query for cpu information at runtime. The caller can
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/// ask for the sizes of the caches and what hardware features are supported.
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/// On Linux, this information is pulled from a couple of sys files (/proc/cpuinfo and
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/// /sys/devices)
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class ARROW_EXPORT CpuInfo {
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public:
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~CpuInfo();
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/// x86 features
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static constexpr int64_t SSSE3 = (1LL << 0);
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static constexpr int64_t SSE4_1 = (1LL << 1);
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static constexpr int64_t SSE4_2 = (1LL << 2);
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static constexpr int64_t POPCNT = (1LL << 3);
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static constexpr int64_t AVX = (1LL << 4);
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static constexpr int64_t AVX2 = (1LL << 5);
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static constexpr int64_t AVX512F = (1LL << 6);
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static constexpr int64_t AVX512CD = (1LL << 7);
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static constexpr int64_t AVX512VL = (1LL << 8);
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static constexpr int64_t AVX512DQ = (1LL << 9);
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static constexpr int64_t AVX512BW = (1LL << 10);
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static constexpr int64_t AVX512 = AVX512F | AVX512CD | AVX512VL | AVX512DQ | AVX512BW;
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static constexpr int64_t BMI1 = (1LL << 11);
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static constexpr int64_t BMI2 = (1LL << 12);
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/// Arm features
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static constexpr int64_t ASIMD = (1LL << 32);
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/// Cache enums for L1 (data), L2 and L3
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enum class CacheLevel { L1 = 0, L2, L3, Last = L3 };
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/// CPU vendors
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enum class Vendor { Unknown, Intel, AMD };
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static const CpuInfo* GetInstance();
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/// Returns all the flags for this cpu
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int64_t hardware_flags() const;
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/// Returns the number of cores (including hyper-threaded) on this machine.
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int num_cores() const;
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/// Returns the vendor of the cpu.
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Vendor vendor() const;
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/// Returns the model name of the cpu (e.g. Intel i7-2600)
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const std::string& model_name() const;
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/// Returns the size of the cache in KB at this cache level
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int64_t CacheSize(CacheLevel level) const;
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/// \brief Returns whether or not the given feature is enabled.
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///
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/// IsSupported() is true iff IsDetected() is also true and the feature
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/// wasn't disabled by the user (for example by setting the ARROW_USER_SIMD_LEVEL
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/// environment variable).
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bool IsSupported(int64_t flags) const;
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/// Returns whether or not the given feature is available on the CPU.
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bool IsDetected(int64_t flags) const;
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/// Determine if the CPU meets the minimum CPU requirements and if not, issue an error
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/// and terminate.
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void VerifyCpuRequirements() const;
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/// Toggle a hardware feature on and off. It is not valid to turn on a feature
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/// that the underlying hardware cannot support. This is useful for testing.
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void EnableFeature(int64_t flag, bool enable);
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bool HasEfficientBmi2() const {
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// BMI2 (pext, pdep) is only efficient on Intel X86 processors.
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return vendor() == Vendor::Intel && IsSupported(BMI2);
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}
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private:
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CpuInfo();
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struct Impl;
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std::unique_ptr<Impl> impl_;
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};
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} // namespace internal
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} // namespace arrow
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